Florian Schleid's picture

Florian Schleid

Flo0620

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Flo0620 's models 161

Flo0620/Qwen2_5_7B_r16_a16_d0_1_ArXivQA

Updated Jun 2, 2025

Flo0620/Qwen2_5_32B_r64_a128_d0_2_AllData2

Updated May 18, 2025

Flo0620/Qwen2_5_32B_r64_a128_d0_2_AllData

Updated May 17, 2025

Flo0620/Qwen2_5_32B-8bit_r64_a128_d0_1_Final

Updated May 15, 2025

Flo0620/Qwen2_5_7B_r64_a128_d0_2For2Epochs

Updated May 15, 2025

Flo0620/Qwen2_5_7B_r64_a128_d0_2_Alldata

Updated May 9, 2025

Flo0620/Qwen2_5_7B_r128_a128_d0_1_lr1e-4_const

Updated May 7, 2025

Flo0620/Qwen2_5_7B_r32_a64_d0_1_lr2e-4_const

Updated May 7, 2025

Flo0620/Qwen2_5_7B_r32_a64_d0_1_lr1e-4_lin

Updated May 7, 2025

Flo0620/Qwen7B-8bit-r64a64d0_1SciVQASpiQAArXivQa

Updated May 7, 2025

Flo0620/Qwen2_5_7B_r32_a64_d0_1_lr1e-4_const

Updated May 7, 2025

Flo0620/Qwen2_5_7B_r256_a512_d0_2

Updated May 6, 2025

Flo0620/Qwen2_5_7B_r128_a256_d0_2

Updated May 6, 2025

Flo0620/Qwen2_5_7B_r64_a128_d0_2

Updated May 6, 2025

Flo0620/Qwen2_5_7B_r32_a64_d0_2

Updated May 6, 2025

Flo0620/Qwen2_5_7B_r16_a32_d0_2

Updated May 6, 2025

Flo0620/Qwen2.5-VL-7B-8bit-alllinear

Updated May 6, 2025

Flo0620/Qwen2_5_7B_r256_a256_d0_2

Updated May 5, 2025

Flo0620/Qwen2_5_7B_r128_a128_d0_2

Updated May 5, 2025

Flo0620/Qwen2_5_7B_r64_a64_d0_2

Updated May 5, 2025

Flo0620/Qwen2_5_7B_r32_a32_d0_2

Updated May 5, 2025

Flo0620/Qwen2_5_7B_r16_a16_d0_2

Updated May 5, 2025

Flo0620/Qwen2_5_7B_r256_a512_d0_1

Updated May 5, 2025

Flo0620/Qwen2_5_7B_r128_a256_d0_1

Updated May 4, 2025

Flo0620/Qwen2_5_7B_r64_a128_d0_1

Updated May 4, 2025

Flo0620/Qwen2_5-VL-7B-8bit_NoApproxiamte

Updated May 4, 2025

Flo0620/Qwen2_5_7B_r32_a64_d0_1

Updated May 4, 2025

Flo0620/Qwen2_5_7B_r128_a128_d0_1WeitertrainedOnSpiQa

Updated May 4, 2025

Flo0620/Qwen2_5_7B_r16_a32_d0_1

Updated May 4, 2025

Flo0620/Qwen2_5_7B_r256_a256_d0_1

Updated May 4, 2025